IC Layout Engineer（短期正職 / 環境好/薪優 可長期配合）
Analog IC Layout Engineer (熟悉 Virtuoso XL) 此職缺為 短期正職3個月為主/ 另可長期配合/ 薪 10萬 （月） 經驗10年+優先 符合下列需求 優先處理屢歷 1. Independently execute layout-design of the assigned Analog & Mixed-Signal / RF blocks, 2. Floor-planning and integration top-level design. 3. Understanding CMOS process and circuit-basics with DNW or TWELL layout experiment 4. Current density and Parasitic-aware routing & doing various required physical verifications. 5. Responsible for the on-time delivery of block-level layouts, w/ acceptable quality. 6. Co-ordinate effectively with team-members, for the successful project execution. 擅長工具 : Layout Editor, DRC LVS , 熟悉 Virtuoso XL 工作技能: IC版圖佈局佈線 ** 短期三個月正職,薪10萬,公司地址:
新竹縣竹北市隘口三街其他:
Skills Required: 1. 2+ years of exp. in Analog Mixed Signal / RF layout-design 2. Good Understanding of CMOS Fundamentals, IC-Fabrication & Circuit-basics 3. Good Understanding of IC Layout design flow & reliability issues 4. Good exposure to EDA tools like Virtuoso L/XL layout editor, Siemens Calibre for Physical verifications. Others: 1. Higher priority if also has APR skills 2. Higher priority if also has DRC LVS command file modification skills.-2024-09-17