Design Verification (DV) Engineer

薪資範圍:待遇面議

公司名稱: 創鑫智慧股份有限公司

Neuchips is looking for a senior digital IC designer for design verification who can contribute organizationally of our AI solution to the world. Responsibilities: - Verify on-chip interconnection such as AXI interface - Verify in-house AI accelerator design Qualifications/Skills: - Familiarity with SystemVerilog and UVM - Familiarity with AMBA protocol - Experience in VIP usage Education and experiment requirements: - MS/Ph.D., Electrical Engineering or Computer Science - A minimum of 3 years of DV experience

公司地址:

新竹縣竹北市高鐵一路36號12樓

其他:

None-2024-09-17
應徵
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