Sr Design Engineer
• Participating in the design team of ACDC Power and Lighting Division (APL), to design a series of products including Mid-power (45W~180W) Charger and Automotive/Smart LED Driver ICs. • To work with Marketing and System/App Engineers to derive design specifications from system target specs. • To work with layout designers and make sure physical design is free of ESD, latch-up, noise, current density, and layout related issue. • To work with System Engineers and make sure ICs meet overall system requirements.公司地址:
新竹市創新三路6號8F其他:
• Master degree in EE or Microelectronics, Minimum of 7 years of Power Management/Analog IC design experience. • Must have designed Power Management ICs such as Buck, Boost, and LDO. Preferred to have design experience of AC-DC Flyback, PFC, and LED driver. • Good knowledge of CMOS and BCD process. • Must have system level understanding and complete application knowledge of IC design. • Must be familiar with Bode plot, stability compensation techniques and able to derive equations in frequency or time domain. • Knowledge of Cadence Analog design and layout tools, Spectre, Matlab, hspice knowledge of Simplis and logic design flow is desirable. • Understanding Package selection and ESD design. • Must be familiar with Silicon design flow from spec to tape-out including design, layout, and chip level verification and checks.-2024-09-17